In many electrical circuits and components, common mode voltage extraction is a critical step. This is particularly true in circuits such as common mode comparator circuits and signal detector circuits.
FIG. 1 is a graph illustrating a signal having differential modes Out+ and Out−, and a common mode CM. As shown in FIG. 1, the common mode CM is the signal which is common to both differential modes Out+ and Out−.
FIG. 2 illustrates an example of a circuit for extracting a common mode voltage, according to the prior art. As shown in FIG. 2, for example, circuit 100, which may be a driver, is connected to a common mode extraction circuit 120 which extracts the common mode from differential signals Out+ and Out−. Circuit 100 includes resistors 10 and 20 connected to transistors 30 and 40, and is grounded at ground 50. An input signal, comprising differential inputs In+ and In−, is fed into the terminals of transistors 30 and 40. Differential outputs Out+ and Out− are extracted from between transistors 30 and 40 and resistors 10 and 20, and fed into common mode extraction circuit 120.
Common mode extraction circuit 120 comprises resistors 60 and 70 connected in series, and the common mode signal CM is output at common mode output 80. Ignoring the effect of transistors 30 and 40 in FIG. 1, the voltage gain may be derived as
            H      ⁡              (        s        )              =                            V          out                          V          in                    =                        g                      m            ⁢                                                  ⁢            1                          ·                  (                                                    R                L                            ·                              R                C                                                                    R                L                            +                              R                C                                              )                      ,where gm1 is the transfer conductance of transistor 30/transistor 40, RL is the resistance of resistors 10 and 20, and RC is the resistance of resistors 60 and 70.
As shown by the equation, the value of the expression in the parentheses decreases as RC decreases. As a result, the gain of the circuit is also decreased as RC decreases. In order to avoid this gain degradation, resistors 50 and 60 need to be large. These large resistors occupy a large die area, leading to an increase in cost, and difficulty in integration.
Accordingly, consistent with the present invention, there is provided a novel circuit which may employ a novel method for extracting a common mode voltage from an input signal which does not use resistors. Embodiments consistent with the present invention may use small transistors for extracting a common mode voltage. The smaller transistors occupy a smaller area on a chip than the large resistors, and thus allow for lowered production costs, and increased integration on smaller devices.